korona wrote:I don't know about the current ARM processors but I remember that programming some of the older ones (I think it was ARMv3?) was not much better than programming x86. They also have multiple operation modes IIRC.
Still not the mess of x86 modes though. I only know of two modes1
, the main ARM instruction set and Thumb, the latter of which is looks more like, say, Java bytecode than a traditional three-address code.1
to know of more if there were more, but I also don't feel confident that there aren't. For example, I am pretty familiar with straight ARM assembly, but I know next to nothing about Thumb. I also don't know if AArch64 is backwards compatible.
I seems that the choice of an instruction set doesn't make a great difference anymore when processors use techniques like microcode and register renaming nowadays
There's a recent paper in some arch conference about RISC vs CISC (I think by some U Wisconsin people but I'm not sure); I didn't read it, but the capsule summary I've heard is that it basically doesn't make a difference any more for power consumption or performance.Edit
: http://research.cs.wisc.edu/vertical/pa ... uggles.pdf
"Our study suggests that at performance levels in the range of A8 and higher, RISC/CISC is irrelevant for performance, power, and energy."
There already have been attempts to get rid of x86: Intel tried to promote its Itanium architecture which is a much more modern but this attempt apparently failed.
To be fair, that was only partially because it wasn't x86; partially it was because it was very atypical even for a non-x86 chip (VLIW instead of traditional RISC) and partially because Intel didn't do it well.
I think you only need to look at the Apple PPC->x86 transition that, while not seemless, went quite well and allowed running legacy apps inside of a VM. Had Intel handled Itanium better, it's very conceivable that that transition would have been more successful. Or maybe not.
I have a slightly anti-x86 position, coming to it from a very weird perspective. But from my position some of the big problems have to do with things like the effect the CISCyness has on instruction semantics rather than performance/power (they're more complicated to reason about).