pretty sure all the IVY bridge chips run a 100mhz core clock. All the clockrates you're throwing around are basically just multipliers on top of that. 3.4ghz? that's a 34x 100mhz clockrate. The multiplier is adjusted. The i5-3570k is given a multiplier that varies as performance and power consumption change between 16-34x (38x with turbo). If you're getting 1.6ghz, it would seem to be fully throttled down when you looked. Maybe this helps?
from: http://www.tomshardware.com/reviews/cor ... 204-2.html
It is my understanding if you want it to hold a clockrate you'd need to turn off the power savings mode and the turbo mode. It'd hold at 3.4ghz unless the TDP was violated and then it would throttle back whither you wanted it to or not out of self-preservation.
DRAM is typically driven by a separate clock, multipled, and double pumped for DDR (dual data rate). The memory's multiplier is locked in the chip. The northbridge (these days internal to the processor) adjusts the DRAM clock, generally some multiple of the core clock, such the the memory speed can be adjusted. Motherboards sometimes fail to recognize the dram clock rating on various memory DIMMs (which often come out well after the motherboard was designed) and can default to clocks that are "rated". DRAM is notoriously horrible about being slow with official speed standards and is most often advertised with it's maximum frequency, not what the actual "official" stamp on the chip says. What does this mean? It means that the motherboard needs to be told what to do with the memory and when it gets confused, it will default to the often considerably slower "rated" stamp on the dram. In this case, your dram clock is probably a multiple of 133mhz (double pumped makes this effectively 266mhz). Your memory can handle a 7x clockrate but the stamp on the chip says 5x. Your board is flexible but will default to the 5x133x2 (1333mhz) value if it does not recognize the specific DIMM module and know to use a 7x multipler.
EDIT: In the "good old days", the core clock was consistent across the board. The FSB (front side bus) was a speed to reflect the underlying clock of the cpu (which would have a fixed multipler, say 10x FSB) and the memory (often 1 to 1). Overclockers, unable to change the CPU's multiplier, would adjust the FSB to overclock the chip. This would speed up the northbridge and memory as well. A common motherboard trick was to use a fancy northbridge to separate the memory clock from the FSB as some multiple allowing a somewhat independent adjusted memory clock. The FSB term stopped meaning much when the northbridge was brought inside the processor and the memory clock was no longer tied to the CPU clock. The interface between the cpu and the main system memory is now direct without FSB coursing through the motherboard.
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