Intel & Micron announce “3D XPoint” memory
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Intel & Micron announce “3D XPoint” memory
Intel and Micron just announced a new form of non-volatile memory called “3D XPoint” (pronounced “cross-point”), which they claim “is up to 1,000 times faster and has up to 1,000 times greater endurance than NAND, and is 10 times denser than conventional memory.”
The BBC article about this development describes the memory cells as storing bits by altering the resistance of the material itself, but all I see on the Intel page is that they “invented unique material compounds and a cross point architecture”.
So, any thoughts on how exactly this works? It doesn’t quite sound like memristors, but maybe something similar?
The BBC article about this development describes the memory cells as storing bits by altering the resistance of the material itself, but all I see on the Intel page is that they “invented unique material compounds and a cross point architecture”.
So, any thoughts on how exactly this works? It doesn’t quite sound like memristors, but maybe something similar?
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Re: Intel & Micron announce “3D XPoint” memory
I just wanted to say: Wow. If these numbers are accurate that is a giant step for a significant bottleneck. Though I assume at least in the beginning the price tag will be quite high too.
Re: Intel & Micron announce “3D XPoint” memory
Qaanol wrote:“3D XPoint” (pronounced “cross-point”)
I'm going to call it ex-point until the day they rename it to cross-point (read: forever). It's like the sms-generation has taken over the marketing industry.

So after a bit of reading, it's not DRAM, it's not SRAM, it's not NAND, it's not PCM, it's most probably not memristors (because HP has patents on that). And looking at the diagram, it's unclear to me if you can read/write a whole row at a time or if it's single addressing all the time.
What we "really need" to take a leap forward in computing, is distributed (RISC) cores tucked away between swathes of (non-volatile) memory, connected to each other with wide buses. And 3D chips of course, but let's start with the easier problem.
Re: Intel & Micron announce “3D XPoint” memory
Having now read several more articles on the matter, concrete info is still pretty scarce. I’ve gathered that Intel, Micron, and their IMFT partnership will each produce 3D XPoint memory, they are aiming to release enterprise-class products in 2016, and “the price will fall between DRAM and NAND” according to Tom’s hardware.
It’s also worth noting that “1,000 times faster than NAND” means it will be approximately as fast as DRAM, or a little bit slower. Similarly, “10 times denser than conventional memory” puts it at about the same density as NAND flash. And of course “non-volatile” could mean the values last anywhere from just a few days to arbitrarily many years. Also, “1,000 times greater endurance than NAND” is fantastic if it’s aiming to replace (or supplement) permanent storage, but totally insufficient if it’s supposed to unseat DRAM.
So we really don’t know much of anything about this new technology yet, except that each bit can be toggled individually, and it’s fast. Depending on the specifics, it could turn out to be a replacement for SSDs, or a replacement for RAM, or both, or an additional cache-style intermediate level of storage.
It’s also worth noting that “1,000 times faster than NAND” means it will be approximately as fast as DRAM, or a little bit slower. Similarly, “10 times denser than conventional memory” puts it at about the same density as NAND flash. And of course “non-volatile” could mean the values last anywhere from just a few days to arbitrarily many years. Also, “1,000 times greater endurance than NAND” is fantastic if it’s aiming to replace (or supplement) permanent storage, but totally insufficient if it’s supposed to unseat DRAM.
So we really don’t know much of anything about this new technology yet, except that each bit can be toggled individually, and it’s fast. Depending on the specifics, it could turn out to be a replacement for SSDs, or a replacement for RAM, or both, or an additional cache-style intermediate level of storage.
wee free kings
Re: Intel & Micron announce “3D XPoint” memory
I just came across this PDF from 2011 which is a slide deck about something called “CMOx Cross-point Memory” by a company named Unity which was backed by Seagate and Micron. It describes a cross-point style replacement for DRAM that functions by modulating the level of oxygen in thin films of metal. The illustrations are very similar to the recently-announced 3D XPoint, right down to the presence of a “selector” layer within each cell.
The slides have a little more detail than what Intel and Micron announced, but not a whole lot. For instance, the layers of the cells are labels as TE, IMO, CMO, and BE. I have heard that Intel bought Unity in 2011, so 3D XPoint seems likely to be a refinement of CMOx Cross-point. Of course four years is a lot of time, and there may have been substantial changes to the design since then, but it’s something.
The slides have a little more detail than what Intel and Micron announced, but not a whole lot. For instance, the layers of the cells are labels as TE, IMO, CMO, and BE. I have heard that Intel bought Unity in 2011, so 3D XPoint seems likely to be a refinement of CMOx Cross-point. Of course four years is a lot of time, and there may have been substantial changes to the design since then, but it’s something.
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Re: Intel & Micron announce “3D XPoint” memory
Qaanol wrote:
So we really don’t know much of anything about this new technology yet, except that each bit can be toggled individually, and it’s fast. Depending on the specifics, it could turn out to be a replacement for SSDs, or a replacement for RAM, or both, or an additional cache-style intermediate level of storage.
I got the impression this was aimed at the storage market
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Re: Intel & Micron announce “3D XPoint” memory
david.windsor wrote:I got the impression this was aimed at the storage market
Everything anounced is aimed at the storage market.
Best guess is that it is a drop in replacement for a [pci-e]SSD. It is far too slow to simply place on a DRAM stick (and presumably the interfaces wouldn't be close), but that doesn't mean that you can't use the stuff as virtual-ram/last level cache. I suspect that there will be plenty of uses of the stuff as virtual ram in servers when first released.
My first impressions of the stuff is that it should be able to replace a large amount of DRAM in the system (I ran a system with 4G until quite recently and barely noticed an issue) as well as make the speed of flash-storage more or less moot (acting as a cache for SSDs). Of course, if this is against Intel and Microns' interest, this might take awhile: this makes how the Intel/Micron 3d flash memory (a completely different system based on traditional flash) is used. As far as I know, Samsung lets the controller use a "well" of ~32 bits as a single bit. This bumps speed and resilience to near single-bit levels. If Intel/Micron's 3d-flash system doesn't work like this [or at least very well] you could find a lot of motherboards on the market with fairly large levels of 3d xpoint vram/cache that would marginalize the difference between premium and bulk SSDs.
I'd also have to wonder how many mobile devices would love to be able to shut down DRAM at whim (or at least cut way down on needed DRAM). Using DRAM as a write-through cache to xpoint would mean they could pretty much shut things down with only the issue of slowly getting back up to speed (and slogging along at low speeds without DRAM for background jobs).
Re: Intel & Micron announce “3D XPoint” memory
I just found this whitepaper (PDF) about the Cross-point Array technology on the old Unity Semiconductor website, via the Wayback Machine. I haven’t read the whole thing yet, but it appears to give some insight into the design of the crisscrossing array, much as the previously-linked PDF gave insight into the design of the memory cells themselves.
Here is a list of Unity Semiconductor’s patents through 2012:
This page talks a little bit about the CMOx memory cells, though without great detail:
More interestingly, here are their technical papers:
And here are their press releases including one about their partnership with Micron.
Here is a list of Unity Semiconductor’s patents through 2012:
Spoiler:
This page talks a little bit about the CMOx memory cells, though without great detail:
Spoiler:
More interestingly, here are their technical papers:
Spoiler:
And here are their press releases including one about their partnership with Micron.
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Re: Intel & Micron announce “3D XPoint” memory
I like that it's definitely not a memristor, and definitely not what HP calls a memristor, but still closer to what HP calls a memristor than an actual memristor would be to either of them.
So much depends upon a red wheel barrow (>= XXII) but it is not going to be installed.
she / her / her
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Re: Intel & Micron announce “3D XPoint” memory
Actual demo products exist now:
http://www.tomshardware.com/news/intel- ... 32434.html
Targetting 2017 sales.
Seems clear this tech needs to get off the PCI bus and onto a memory controller. It's looking like a much larger memory pool that's a little slower. No more paging and virtual memory.
http://www.tomshardware.com/news/intel- ... 32434.html
Targetting 2017 sales.
Seems clear this tech needs to get off the PCI bus and onto a memory controller. It's looking like a much larger memory pool that's a little slower. No more paging and virtual memory.
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Re: Intel & Micron announce “3D XPoint” memory
Impressive tech, but this worries me: http://media.bestofmicro.com/1/H/602693/original/03.jpg
DRAM isn't exactly dense. We're looking at tens, or low-hundreds of GB of storage. Not at the 100TBs that was just announced by Toshiba by classic Flash RAM.
Less dense (and therefore more expensive) than Flash, while being much much faster than it, creates an awkward zone. Big Data customers have DRAM-only databases, but such databases / storage is simply outside the price point of a standard consumer. Hell, how many people actually use say... 2TB of DDR3 or DDR4?
DRAM isn't exactly dense. We're looking at tens, or low-hundreds of GB of storage. Not at the 100TBs that was just announced by Toshiba by classic Flash RAM.
Less dense (and therefore more expensive) than Flash, while being much much faster than it, creates an awkward zone. Big Data customers have DRAM-only databases, but such databases / storage is simply outside the price point of a standard consumer. Hell, how many people actually use say... 2TB of DDR3 or DDR4?
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Some competition
http://nantero.com/technology/
No idea how close they are to production, but they inked a deal with fujitsu recently. Pretty much claim the same or more as 3d Xpoint, but there seem to be the slightest whiff of wesealing that makes me think that you can have:
speed of RAM OR less power than flash OR higher density than flash
Still, there have always been various sorts of next generation memories steamrollered by Moore's law. Note that Moore's law is still viable in memory (and stacked 3d transistors *count*, the paper merely was about transistors per die), so these things have to be wildly easier to manufacture than current storage schemes to survive in tomorrow's market.
Note that one of the reasons Intel (and even more expensive iron from IBM) seems to have the server market sewn up is that the cost of the memory per server is astronomical. It doesn't make sense to have a less powerful server no matter how much cheaper if it doesn't get good returns for the cost of the memory. Switch to "3d xpoint", NRAM, or even SLC flash and suddenly the whole game might change. Considering AMD has already shown a relatively low power/massive bandwidth to a 4G memory (a mere cache for a good-sized server), they might manage to create a cost effective server by using such things as "main memory". I'm wondering when somebody will try it (preferably at the MMU level, Intel has a bunch of slides that merely imply using regular old flash across a PCIe link. This is the slow & steady progress of somebody who wants to milk all the money out of each stage and not hungry for a disruption).
No idea how close they are to production, but they inked a deal with fujitsu recently. Pretty much claim the same or more as 3d Xpoint, but there seem to be the slightest whiff of wesealing that makes me think that you can have:
speed of RAM OR less power than flash OR higher density than flash
Still, there have always been various sorts of next generation memories steamrollered by Moore's law. Note that Moore's law is still viable in memory (and stacked 3d transistors *count*, the paper merely was about transistors per die), so these things have to be wildly easier to manufacture than current storage schemes to survive in tomorrow's market.
Note that one of the reasons Intel (and even more expensive iron from IBM) seems to have the server market sewn up is that the cost of the memory per server is astronomical. It doesn't make sense to have a less powerful server no matter how much cheaper if it doesn't get good returns for the cost of the memory. Switch to "3d xpoint", NRAM, or even SLC flash and suddenly the whole game might change. Considering AMD has already shown a relatively low power/massive bandwidth to a 4G memory (a mere cache for a good-sized server), they might manage to create a cost effective server by using such things as "main memory". I'm wondering when somebody will try it (preferably at the MMU level, Intel has a bunch of slides that merely imply using regular old flash across a PCIe link. This is the slow & steady progress of somebody who wants to milk all the money out of each stage and not hungry for a disruption).
Re: Intel & Micron announce “3D XPoint” memory
I think, in short, system memory's latency is getting too long and it will move on-dye. 3D XPoint (or some other branding, what's in a name?) will become the system memory and be much larger than today. Disks will essentially be repalced by network storage since the system memory is no-volatile even start-up information is not needed. Anything archival will not be purely local. Flash will dominate storage servers where volume is key.
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Re: Intel & Micron announce “3D XPoint” memory
mosc wrote:I think, in short, system memory's latency is getting too long and it will move on-dye. 3D XPoint (or some other branding, what's in a name?) will become the system memory and be much larger than today. Disks will essentially be repalced by network storage since the system memory is no-volatile even start-up information is not needed. Anything archival will not be purely local. Flash will dominate storage servers where volume is key.
I disagree. DRAM is still faster than 3D XPoint and Hard Drives have significantly higher bandwidth than standard networking technologies.
http://www.legitreviews.com/wp-content/ ... chmark.jpg
Don't get me wrong, 2GB/s is mighty fast, but DDR3 RAM is ~20GB/s. Transitioning from RAM to Optane is going to slow down virtually everybody. Optane seems like a (potential) future of NAND Flash, but Intel needs to get the costs down.
MLC and TLC SSDs have proven that no one cares about speed anymore of storage. SSDs have only gotten slower (how many of us are actually buying the Intel 750 PCIe 2GB/s drive for $750. Anybody??). Instead, people are buying slower and slower drives, like the Samsung 850 Evo (TLC, so its significantly slower than normal MLC drives). In fact, we can go back to SLC SSDs if anyone actually cared about speed.
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Another note: modern Hard Drives have a bandwidth of ~150MB/s (at least, mine does, last time I benchmarked it). Networks are practically capped at 1gbps (Ethernet) or 1.2gbps (802.11 ac under perfect conditions). There's a big difference between 1gbps and 10gbps costwise, so in practice, Hard Drives are much faster than any networking technology.
The new memory tiers, when Optane becomes big, will be:
* Registers (immediate access by CPU, as they're inside the cores)
* L1 / L2 / L3 Cache
* DDR4 RAM (~20GB/s for Dual-channel systems)
* Optane (~2GB/s)
* PCIe SSDs (~1.8GB/s) (Including M.2 PCIe or SATAe SSDs)
* SATA3 MLC SSDs (~500MB/s)
* SATA3 TLC "cheap" SSDs (~300MB/s)
* LTO-7 Tape Drives (300MB/s... yeah... really. The latency is killer though and the drives are expensive)
* Hard Drives (~150MB/s)
* Networks (~100MB/s) (Assuming 1gbps Ethernet)
* Lol BluRay (~15MB/s)
The above numbers are bandwidth, not latency. Latency seems to be a bigger draw for Optane. I'm not sure if Optane is going to be a "revolution", based on the relatively slow adoption of PCIe SSDs.
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Re: Intel & Micron announce “3D XPoint” memory
mosc wrote:I think, in short, system memory's latency is getting too long and it will move on-dye. 3D XPoint (or some other branding, what's in a name?) will become the system memory and be much larger than today. Disks will essentially be repalced by network storage since the system memory is no-volatile even start-up information is not needed. Anything archival will not be purely local. Flash will dominate storage servers where volume is key.
Today's memory is physically too large to be moved onto the die. I also doubt that system memory will be replaced by NVRAM anytime soon. NVRAM may be a good replacement for disk storage but main RAM does not only require high bandwidth but also (and probably more importantly, depending on the work load) low latency. It is relatively easy to get high bandwidth through parallelization (e.g. RAID; PCIe can sustain about 15 GB/s using 16 lanes) but improving latency requires fundamental technology improvements.
EDIT: It seems that the first generation of 3D XPoint will achieve a latency of 9 microseconds. DRAM latency is in the 100 ns range.
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Re: Intel & Micron announce “3D XPoint” memory
korona wrote:mosc wrote:I think, in short, system memory's latency is getting too long and it will move on-dye. 3D XPoint (or some other branding, what's in a name?) will become the system memory and be much larger than today. Disks will essentially be repalced by network storage since the system memory is no-volatile even start-up information is not needed. Anything archival will not be purely local. Flash will dominate storage servers where volume is key.
Today's memory is physically too large to be moved onto the die. I also doubt that system memory will be replaced by NVRAM anytime soon. NVRAM may be a good replacement for disk storage but main RAM does not only require high bandwidth but also (and probably more importantly, depending on the work load) low latency. It is relatively easy to get high bandwidth through parallelization (e.g. RAID; PCIe can sustain about 15 GB/s using 16 lanes) but improving latency requires fundamental technology improvements.
And don't forget, memory is moving forward as well. HBM is the future.


Not quite "on die", but "on package" (so its literally inside the chip, but the chip itself is starting to become a system). AMD's Fury X has a 4096-lane bus between the GPU and the HBM memory.
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Intel "Crystalwell" also accomplished this, through different means.

See that big chunk of RAM next to the die? They're all on the chip now.
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Crystalwell == ~128MB. AMD Fury X is 4GB of RAM. This stuff is cutting-edge, so they're still smaller than standard DDR4 sticks. The HBM memory, despite being "wide as fuck" (4096? holy shit) is downclocked due to heating issues at the moment. (In contrast, each DDR4 stick have 288 lines of copper on them. Even 8 DDR4 sticks is only 2304 lines of copper)
So yeah, its technology that's just barely possible and not quite cost-effective yet. But its clearly where the big-players are going. Maybe in 10 years we won't be buying DDR-sticks anymore, as the RAM will be on-chip (but not on-die). There's just no way to run 4096 lines of copper on a motherboard. Plus, being so physically close to the CPU / GPU means that latency will improve. (Something about the speed of light. You know... light can only travel ~1cm per clock-tick right? 300 million meters/second isn't very fast when the clock-speeds are pushing 3-billion ticks per second)
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Re: Intel & Micron announce “3D XPoint” memory
Yes, high bandwidth definitely makes sense for stuff like GPUs with a uniform access pattern (stuff like primitive buffers are usually accessed sequentially).
It does not help so much with the random access patterns of most CPU-bound code. However moving stuff like memory or PCI lanes closer to the CPU will help improving latency even for CPU-bound tasks. This is not really a new idea: Historically CPUs (in the ICH era) had an external memory controller whereas today's CPU integrate the memory controller and PCIe root complex with the CPU. However I don't know how much of the memory latency is caused by the wire though; I guess most of it is caused by stuff like DRAM access times and coherency protocols.
I could imagine that stuff like heat dissipation could be a problem for current technologies (this is anecdotally: my CPU and memory each have their own heatsinks; pairing them together would probably require much more effective cooling) but it I guess we will see more such solutions in the future.
It does not help so much with the random access patterns of most CPU-bound code. However moving stuff like memory or PCI lanes closer to the CPU will help improving latency even for CPU-bound tasks. This is not really a new idea: Historically CPUs (in the ICH era) had an external memory controller whereas today's CPU integrate the memory controller and PCIe root complex with the CPU. However I don't know how much of the memory latency is caused by the wire though; I guess most of it is caused by stuff like DRAM access times and coherency protocols.
I could imagine that stuff like heat dissipation could be a problem for current technologies (this is anecdotally: my CPU and memory each have their own heatsinks; pairing them together would probably require much more effective cooling) but it I guess we will see more such solutions in the future.
Re: Intel & Micron announce “3D XPoint” memory
Well I also think the size of DRAM isn't needed when you have an XPoint-like "dimm" a few inches away either. These multi-layer memory technologies will eventually lead to much denser DRAM as well. I'm thinking more of additional layers on top of the CPU die for "memory". Imagine a system today with a 1GB GDDR5 on die memory layer that's 512-bit wide. It's not very big and it's volatile but it's extremely fast. The memory controller is no longer interfacing through the motherboard at all (hence the width). 16 PCI lanes then support a very fast piece of this "XPoint" drive that sits on a DIMM on the motherboard. It's 1TB or so lets say and not much slower than DDR3. The computer also has plenty of network storage that can keep up with 1gb/s sufficient for 4K video or other streaming needs.
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